function [v_tx,n_ldM]=mapeador(v_bits,n_mod_tipo) v_tx=[]; n_ldM=n_mod_tipo; load ENC2.mat load ENC4.mat load ENC16.mat load ENC64.mat switch n_mod_tipo %MODULADOR BPSK case 1 for i=1:1:length(v_bits) switch v_bits(i) case {0} v_tx=[v_tx s2(1)]; case {1} v_tx=[v_tx s2(2)]; end end %MODULADOR QPSK case 2 for i=1:2:length(v_bits) %Voy cogiendo los bits de 2 en 2 ent(1:2)=v_bits(i:i+1); switch ent(1) case {0} switch ent(2) case {0} v_tx=[v_tx s4(1)]; case {1} v_tx=[v_tx s4(2)]; end case {1} switch ent(2) case {0} v_tx=[v_tx s4(3)]; case {1} v_tx=[v_tx s4(4)]; end end end %MODULADOR 16-QAM case 4 for i=1:4:length(v_bits) %Voy cogiendo los bits de 4 en 4 ent(1:4)=v_bits(i:i+3); switch ent(1) case {0} %0 switch ent(2) case {0} %00 switch ent(3) case {0} %000 switch ent(4) case {0} %0000 v_tx=[v_tx s16(1)]; case {1} %0001 v_tx=[v_tx s16(2)]; end case {1} switch ent(4) case {0} %0010 v_tx=[v_tx s16(3)]; case {1} %0011 v_tx=[v_tx s16(4)]; end end case {1} %01 switch ent(3) case {0} %010 switch ent(4) case {0} %0100 v_tx=[v_tx s16(5)]; case {1} %0101 v_tx=[v_tx s16(6)]; end case {1} %011 switch ent(4) case {0} %0110 v_tx=[v_tx s16(7)]; case {1} %0111 v_tx=[v_tx s16(8)]; end %del switch ent(4) end %del switch ent(3) end %del switch ent(2) case {1} %1 switch ent(2) case {0} %10 switch ent(3) case {0} %100 switch ent(4) case {0} %1000 v_tx=[v_tx s16(9)]; case {1} %1001 v_tx=[v_tx s16(10)]; end case {1} switch ent(4) case {0} %1010 v_tx=[v_tx s16(11)]; case {1} %1011 v_tx=[v_tx s16(12)]; end end case {1} %11 switch ent(3) case {0} %110 switch ent(4) case {0} %1100 v_tx=[v_tx s16(13)]; case {1} %1101 v_tx=[v_tx s16(14)]; end case {1} %111 switch ent(4) case {0} %1110 v_tx=[v_tx s16(15)]; case {1} %1111 v_tx=[v_tx s16(16)]; end %del switch ent(4) end %del switch ent(3) end %del switch ent(2) end %del switch ent(1) end %del for de mod 16 QAM case 6 %MODULACION 64 QAM for i=1:6:length(v_bits) %Voy cogiendo los bits de 6 en 6 ent(1:6)=v_bits(i:i+5); switch ent(1) case {0} %0 switch ent(2) case {0} %00 switch ent(3) case {0} %000 switch ent(4) case {0} %0000 switch ent(5) case {0} %00000 switch ent(6) case {0} %000000 v_tx=[v_tx s64(1)]; case {1} %000001 v_tx=[v_tx s64(2)]; end %fin del swi6 case {1} %00001 switch ent(6) %00001 case {0} %000010 v_tx=[v_tx s64(3)]; case {1} %000011 v_tx=[v_tx s64(4)]; end %fin del swi6 end %fin del swi5 case{1} %0001 switch ent(5) case {0} %00010 switch ent(6) case {0} %000100 v_tx=[v_tx s64(5)]; case {1} %000101 v_tx=[v_tx s64(6)]; end % fin del swi6 case{1} %00011 switch ent(6) case {0} %000110 v_tx=[v_tx s64(7)]; case {1} %000111 v_tx=[v_tx s64(8)]; end %fin del swi6 end %fin swi5 end %fin del swi4 case {1} %001 switch ent(4) case {0} %0010 switch ent(5) case {0} %00100 switch ent(6) case {0} %001000 v_tx=[v_tx s64(9)]; case {1} %001001 v_tx=[v_tx s64(10)]; end %fin del swi6 case{1} %00101 switch ent(6) case {0} %001010 v_tx=[v_tx s64(11)]; case {1} %001011 v_tx=[v_tx s64(12)]; end %fin del swi6 end %fin del swi5 case {1} %0011 switch ent(5) case {0} %00110 switch ent(6) case {0} %001100 v_tx=[v_tx s64(13)]; case {1} %001101ç v_tx=[v_tx s64(14)]; end %fin del swi6 case{1} %00111 switch ent(6) case {0} %001110 v_tx=[v_tx s64(15)]; case {1} %001111 v_tx=[v_tx s64(16)]; end %fin del swi6 end %fin del swi5 end %fin del swi4 end %fin del swi3 case {1} %01 switch ent(3) case {0} %010 switch ent(4) case{0} %0100 switch ent(5) case {0} %01000 switch ent(6) case {0} %010000 v_tx=[v_tx s64(17)]; case {1} %010001 v_tx=[v_tx s64(18)]; end %fin del swi6 case {1} %01001 switch ent(6) case {0} %010010 v_tx=[v_tx s64(19)]; case {1} %010011 v_tx=[v_tx s64(20)]; end %fin del swi6 end %fin de swi5 case {1} %0101 switch ent(5) case {0} %01010 switch ent(6) case {0} %010100 v_tx=[v_tx s64(21)]; case {1} %010101 v_tx=[v_tx s64(22)]; end %fin del swi6 case {1} %01011 switch ent(6) case {0} %010110 v_tx=[v_tx s64(23)]; case {1} %010111 v_tx=[v_tx s64(24)]; end %fin del swi6 end %fin del sw5 end %fin de swi4 case {1} %011 switch ent(4) case {0} %0110 switch ent(5) case {0} %01100 switch ent(6) case {0} %011000 v_tx=[v_tx s64(25)]; case {1} %011001 v_tx=[v_tx s64(26)]; end %fin swi6 case {1} %01101 switch ent(6) case {0} %011010 v_tx=[v_tx s64(27)]; case {1} %011011 v_tx=[v_tx s64(28)]; end %fin swi6 end %fin de swi5 case {1} %0111 switch ent(5) case {0} %01110 switch ent(6) case {0} %011100 v_tx=[v_tx s64(29)]; case {1} %011101 v_tx=[v_tx s64(30)]; end %fin swi6 case {1} %01111 switch ent(6) case {0} %011110 v_tx=[v_tx s64(31)]; case {1} %011111 v_tx=[v_tx s64(32)]; end %fin swi6 end %fin de swi5 end %fin swi4 end %fin del switch 3 end %fin del swi2 case {1} %1 switch ent(2) case {0} %10 switch ent(3) case {0} %100 switch ent(4) case {0} %1000 switch ent(5) case {0} %10000 switch ent(6) case {0} %100000 v_tx=[v_tx s64(33)]; case {1} %100001 v_tx=[v_tx s64(34)]; end %fin del swi6 case {1} %00001 switch ent(6) %00001 case {0} %100010 v_tx=[v_tx s64(35)]; case {1} %100011 v_tx=[v_tx s64(36)]; end %fin del swi6 end %fin del swi5 case{1} %1001 switch ent(5) case {0} %10010 switch ent(6) case {0} %100100 v_tx=[v_tx s64(37)]; case {1} %000101 v_tx=[v_tx s64(38)]; end % fin del swi6 case{1} %10011 switch ent(6) case {0} %100110 v_tx=[v_tx s64(39)]; case {1} %100111 v_tx=[v_tx s64(40)]; end %fin del swi6 end %fin swi5 end %fin del swi4 case {1} %101 switch ent(4) case {0} %1010 switch ent(5) case {0} %10100 switch ent(6) case {0} %101000 v_tx=[v_tx s64(41)]; case {1} %001001 v_tx=[v_tx s64(42)]; end %fin del swi6 case{1} %00101 switch ent(6) case {0} %001010 v_tx=[v_tx s64(43)]; case {1} %001011 v_tx=[v_tx s64(44)]; end %fin del swi6 end %fin del swi5 case {1} %1011 switch ent(5) case {0} %10110 switch ent(6) case {0} %101100 v_tx=[v_tx s64(45)]; case {1} %101101 v_tx=[v_tx s64(46)]; end %fin del swi6 case{1} %10111 switch ent(6) case {0} %101110 v_tx=[v_tx s64(47)]; case {1} %101111 v_tx=[v_tx s64(48)]; end %fin del swi6 end %fin del swi5 end %fin del swi4 end %fin del swi3 case {1} %11 switch ent(3) case {0} %110 switch ent(4) case{0} %1100 switch ent(5) case {0} %11000 switch ent(6) case {0} %110000 v_tx=[v_tx s64(49)]; case {1} %110001 v_tx=[v_tx s64(50)]; end %fin del swi6 case {1} %11001 switch ent(6) case {0} %110010 v_tx=[v_tx s64(51)]; case {1} %110011 v_tx=[v_tx s64(52)]; end %fin del swi6 end %fin de swi5 case {1} %1101 switch ent(5) case {0} %11010 switch ent(6) case {0} %110100 v_tx=[v_tx s64(53)]; case {1} %010101 v_tx=[v_tx s64(54)]; end %fin del swi6 case {1} %11011 switch ent(6) case {0} %110110 v_tx=[v_tx s64(55)]; case {1} %110111 v_tx=[v_tx s64(56)]; end %fin del swi6 end %fin del sw5 end %fin de swi4 case {1} %111 switch ent(4) case {0} %1110 switch ent(5) case {0} %11100 switch ent(6) case {0} %111000 v_tx=[v_tx s64(57)]; case {1} %111001 v_tx=[v_tx s64(58)]; end %fin swi6 case {1} %11101 switch ent(6) case {0} %111010 v_tx=[v_tx s64(59)]; case {1} %111011 v_tx=[v_tx s64(60)]; end %fin swi6 end %fin de swi5 case {1} %1111 switch ent(5) case {0} %11110 switch ent(6) case {0} %111100 v_tx=[v_tx s64(61)]; case {1} %111101 v_tx=[v_tx s64(62)]; end %fin swi6 case {1} %11111 switch ent(6) case {0} %111110 v_tx=[v_tx s64(63)]; case {1} %111111 v_tx=[v_tx s64(64)]; end %fin swi6 end %fin de swi5 end %fin swi4 end %fin del switch 3 end %fin del swi2 end %fin del swi1 end %fin del for end %fin del tipo de mod