Computer Architecture
The Anatomy of Modern Processors
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Register File
The Register File is the highest level of the memory
hierarchy. In a very simple processor, it consists of a single memory location -
usually called an accumulator. The result of ALU operations was stored here and
could be re-used in a subsequent operation or saved into memory.
In a modern processor, it's considered necessary to have at least 32
registers for integer values and often 32 floating point registers as well. Thus
the register file is a small, addressable memory at the top of the memory hierarchy. It's visible to programs (which
address registers directly), so that the number and type (integer or floating
point) of registers is part of the instruction set architecture (ISA).
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Registers are built from fast multi-ported memory cells. They must be
fast: a register must be able to drive its data onto an internal bus in a
single clock cycle. They are multi-ported because a register must be able
to supply its data to either the A or the B input of the ALU and accept a
value to be stored from the internal data bus. |
Register File Capacity
A modern processor will have at least 32 integer
registers each capable of storing a word of 32 (or, more recently, 64) bits. A
processor with floating point capabilities will generally also provide 32 or
more floating point registers, each capable of holding a double precision
floating point word. These registers are used by programs as temporary storage
for values which will be needed for calculations. Because the registers are
"closest" to the processor in terms of access time - able to supply a value
within a single clock cycle - an optimising compiler for a high level language
will attempt to retain as many frequently used values in the registers as
possible. Thus the size of the register file is an important factor in the
overall speed of programs. Earlier processors with fewer than 32 registers
(eg early members of the x86 family) severely hampered the ability of the
compiler to keep frequently referenced values close to the processor.
However, it isn't possible to arbitrarily increase the size of the register
file. With too many registers:
- the capacitative load of too many cells on the data line will reduce its
response time,
- the resistance of long data lines needed to connect many cells will
combine with the capacitative load to reduce the response time,
- the number of bits needed to address the registers will result in longer
instructions. A typical RISC instruction has three operands:
sub $5, $3, $6
requiring 15 bits with 32 (=
25) registers,
- the complexity of the address decoder (and thus its propagation delay
time) will increase as the size of the register file increases.
Ports
Register files need at least 2 read ports: the ALU has two input
ports and it may be necessary to supply both of its inputs from the same
register: eg add $3, $2, $2
The value in register 2 is added to itself and the result stored in
register 3. So that both operands can be fetched in the same cycle, each
register must have two read ports.
As we will see later, in superscalar
processors, it's necessary to have two read ports and a write port for
each functional unit, because such processors can issue an instruction to
every functional unit in the same clock cycle.
Key terms |
- memory hierarchy
- Storage in a processor may be arranged in a hierarchy, with small,
fast memories at the "top" of the hierarchy and slower, larger ones at
the bottom. Managing this hierarchy effectively is one of the major
challenges of computer architecture.
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© John Morris, 1998