Computer Architecture
The Anatomy of Modern Processors


Superscalar Processors

Superscalar processors - the MIPS R10000 is a typical modern example - have multiple functional units. This enables their instruction issue units to emit multiple instructions into the execution section of the pipeline at the same time.

Instruction Issue Unit

The instruction issue unit will usually fetch a whole line (4-8 instructions) from the cache at a time and determine whether they can be issued to the various functional units. To do this, it checks whether an instruction's operands are available yet. If the register which contains one of the operands is being written by some instruction that has been despatched into the pipeline, but which has not completed (retired or "graduated") yet, then all instructions reading that register must be stalled (wait in the instruction issue unit) until the writing instruction has completed. Any instruction whose operands are available is a candidate for issue and the issue unit will check whether the requested functional unit is available. (It is not uncommon for functional units to be duplicated, so that the issue unit may have, for example, two floating point adders to choose from.)

Additional References

Continue on to SuperPipelined Processors
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© John Morris, 1998

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