-----------------------------------------------------------------------------
-- This file is a part of the ARM8 VHDL model
-- Copyright (C) 2001 Escuela Superior de Ingenieros (ESI) Sevilla
-----------------------------------------------------------------------------
-- Entity: exception
-- File: exception.vhd
-- Author: Francisco Javier Jurado Carmona
-- Tutor: Jonathan Noel Tombs
-- Description: exception priorizer
------------------------------------------------------------------------------
-- Version control:
-- 21-11-2001: First implemetation
------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use work.ARM8.all;
entity exception is
port (
swi_notify: in std_logic;
und_notify: in std_logic;
exc_happens: out std_logic;
excep: out std_logic_vector (2 downto 0);
nFIQ: in std_logic;
nIRQ: in std_logic;
nABORT: in std_logic
);
end exception;
architecture COMP of exception is
begin
priorize: process (nFIQ,nIRQ,nABORT,swi_notify,und_notify)
begin
exc_happens<='0';
excep<=(others=>'0');
if swi_notify='1' then exc_happens<='1'; excep<=SWI_EXC; end if;
if und_notify='1' then exc_happens<='1'; excep<=UND_EXC; end if;
if nIRQ = '0' then exc_happens<='1'; excep<=IRQ_EXC; end if;
if nFIQ = '0' then exc_happens<='1'; excep<=FIQ_EXC; end if;
if nABORT = '0' then exc_happens<='1'; excep<=ABORT_EXC; end if;
end process;
end COMP;
e-REdING. Biblioteca de la Escuela Superior de Ingenieros de Sevilla.
